Wolfgang Roethig, Senior Engineering Manager, EDA R&D Group, NEC Electronics Inc., Chairman of Accellera's Advanced Library Format (ALF), Santa Clara, Calif. Traditionally, ASIC design has been ...
SANTA CRUZ, Calif. — Paving the way for greater library and EDA tool interoperability, the IEEE has approved Accellera's Advanced Library Format (ALF) and Verilog and VHDL synthesis subsets as new ...
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