In this paper, the authors introduce two novel architectures for parallel decimal multipliers. Their multipliers are based on a new algorithm for decimal carry – save multioperand addition that uses a ...
In order to meet the requirements in real time DSP applications MAC unit is required. The speed of the MAC unit determines the overall performance of the system. MAC unit basically consists of ...
As defined by the IEEE 754 standard, floating-point values are represented in three fields: a significand or mantissa, a sign bit for the significand and an exponent field. The exponent is a biased ...
The complex computational block on Atmel’s mAgic DSP core consists of four integer/floating-point multipliers, an adder, a subtractor, and two add-subtract integer ...
Staking a claim to the title of world's fastest 64-bit floating-point coprocessor chip, Clear-Speed Technology's CSX600 can deliver a sustained 25 GFLOPs for DGEMM (matrix multiplication) calculations ...
Infinite impulse response (IIR) filter implementations can have different forms (direct, standard, ladder, …), different math (fixed-point or floating-point), and different quantization (number of ...
This paper discusses a simple and effective method for the summation of long sequences of floating point numbers. The method comprises two phases: an accumulation phase where the mantissas of the ...
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