Design-Reuse

Xilinx pcie pmda IP Listing

Rambus PCIe 5.0 Controller is a configurable and scalable PCIe controller Soft IP designed for ASIC and FPGA implementation. Rambus PCIe 5.0 Controller is compliant with the PCI Express 5.0 ... Rambus ...
EDN

Xilinx says new IP core will support PCI Express

Continuing a tradition of offering the latest I/O technology in programmable form before it's available in standard chips, Xilinx Inc. today is unveiling what it claims is the first IP core to support ...
Design-Reuse

Xilinx Ships FPGA Industry's Only Compliant Programmable x8 PCI Express IP Core

SAN JOSE, Calif. -- Feb. 7, 2006 -- Xilinx, Inc. (Nasdaq: XLNX - News) today announced immediate availability of its compliant x1, x4 and x8 lane LogiCORE(TM) PCI Express IP Core ("PCIe IP Core") ...
Business Wire

Enyx Premieres 25G TCP and UDP Offload Engines with Xilinx Virtex UltraScale+ 16nm FPGA on BittWare’s XUPP3R PCIe Board

SALT LAKE CITY--(BUSINESS WIRE)--SC16 Conference — Enyx is pleased to announce the 25G version of its enterprise-class TCP/IP, UDP/IP and MAC Intellectual Property ...
Design News

New Xilinx Virtex-6 and Spartan-6 FPGA Connectivity Development Kits Include Northwest Logic DMA Engine IP

SOFTWARE/HARDWARE: Xilinx Inc. recently announced the availability of the new Xilinx ® Virtex ®-6 and Spartan ®-6 FPGA Connectivity Development Kits that provide a comprehensive, easy-to-use, and ...
Semiconductor Engineering

Using PCIe Real World Interface For High-Speed Hybrid Prototyping

An approach to hybrid prototyping using a PCIe interface between the HAPS FPGA-based prototyping and the Virtualizer virtual prototyping. This white paper highlights a novel approach to hybrid ...
Electronic Design

Xilinx PCIe Development Kit Addresses Broad Market Range

Targeting designers across a wide range of markets in communications, networking, video broadcast, storage, and computing, the company's development kit for PCI Express is based on its Virtex-5 family ...