Design-Reuse

Interface-based design sees both forest and trees

With multiple intellectual property sources being used and reused in the current era of system-on-chip design, one challenge for designers is how to rapidly describe the interfaces for new blocks of ...
EDN

Block diagram (SBD) for Single Board Computer, Human Machine Interface application equipment

The proposed solution can be used to design equipment that can function as one of three industrial applications namely Single Board computer, Human Machine Interface panel (also known as Operator ...
EDN

DDR4 memory interface: Solving PCB design challenges

DDR SDRAM technology has reached its 4th generation. The DDR4 SDRAM interface achieves a maximum data rate of 3.6Gbps per bit (i.e., clock rate of 1.8GHz). There are four key challenges in designing ...
Electronic Design

Eye-Diagram Analysis Speeds DDR SDRAM Validation

Double-data-rate synchronous dynamic random access memory (DDR SDRAM) physical-layer testing is a crucial step in making sure devices comply with the JEDEC specification. The ultimate goal is to ...