• Designed a simulator for an out-of-order superscalar processor based on Tomasulo’s algorithm. • Integrated the Instruction Cache with the dynamic instruction scheduler to model the fetch from the ...
(VHDL, ModelSim, Xilinx) Simulated and synthesized a processor with a clock frequency of 25 MHz. Used Tomasulo algorithm to dynamically schedule instructions and execute them in out of program order ...
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