Integrated circuit (IC) sizes continue to grow as they meet the compute requirements of cutting-edge applications such as artificial intelligence (AI), autonomous driving, and data centers. As design ...

Multi-die assemblies greatly increase the number of things that can go wrong, and the difficulty of finding them.

Design-for-test, or DFT, should facilitate high-quality test, not change the design. Test techniques and strategies need to supply a high-quality test that screens out defective devices, avoiding ...

Historically, testability is an afterthought in the design process. But heightening complexity of chip designs, and especially SoCs, forces testability (and manufacturability) to take a more central ...

Huge transistor counts, rising on-chip clock rates, the relentlessly escalating levels of integration in systems-on-chip, and the new types of defects seen in deep-submicron and nanometer processes ...